Cirrus-logic EP93xx Instrukcja Użytkownika Strona 164

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6-2 DS785UM1
Copyright 2007 Cirrus Logic
Vectored Interrupt Controller
EP93xx User’s Guide
6
6
6
Figure 6-1. Vectored Interrupt Controller Block Diagram
6.1.1 Interrupt Priority
A FIQ interrupt has the highest priority (because the ARM9 core will always treat FIQ as
higher priority), followed by vectored interrupt 0 to vectored interrupt 15. Non-vectored IRQ
interrupts have the lowest priority. Any of the non-vectored Interrupts can be either FIQ or
IRQ (the interrupt type is determined by programming the appropriate register,
‘VICxIntSelect’ on page 6-11).
Vector Address and Priority
Logic
Vector Address and
Priority Logic
VIC Daisy Chain
VICINTSOURCE[63:32]
IRQ from VIC1
Vector Addr from VIC1
VICINTSOURCE[31:0]
IRQ
VIC1
VIC0
FIQ from VIC1
ARM920T
FIQ
2
1
2
2
2
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