Cirrus-logic CS53L21 Instrukcja Użytkownika Pobierz pdf (Strona 47)

DS700PP1 47

CS53L21

6.7 ADCx Input Select, Invert & Mute (Address 07h)

ADCX Input Select Bits (AINX_MUX[1:0])

Default: 00

Function:

Selects the specified analog input signal into ADCx. The microphone pre-amplifier is only available when

PDN_PGAx is disabled. See Figure 21.

ADCX Invert Signal Polarity (INV_ADCX)

Default: 0

0 - Disabled

1 - Enabled

Function:

When enabled, this bit will invert the signal polarity of the ADC x channel.

ADCX Channel Mute (ADCX_MUTE)

Default: 0

0 - Disabled

1 - Enabled

Function:

The output of channel x ADC will mute when enabled. The muting function is affected by the ADCx Soft bit

(SOFT).

76543210

AINB_MUX1 AINB_MUX0 AINA_MUX1 AINA_MUX0 INV_ADCB INV_ADCA ADCB_MUTE ADCA_MUTE

PDN_PGAx AINx_MUX[1:0] Selected Path to ADC

0 00 AIN1x-->PGAx

0 01 AIN2x-->PGAx

0 10 AIN3x/MICINx-->PGAx

0 11 AIN3x/MICINx-->Pre-Amp

(+16/+32 dB Gain)-->PGAx

100AIN1x

101AIN2x

1 10 AIN3x/MICINx

1 11 Reserved

MUX

AIN1x

AIN2x

AIN3x / MICINx

PGA

+16/

32 dB

MUX

AINx_MUX[1:0]

PDN_PGAx

AIN1x

AIN2x

AIN3x

Decoder

ADC

Figure 21. AIN & PGA Selection

1 2 ... 42 43 44 45 46 47 48 49 50 51 52 ... 65 66

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