Cirrus-logic CRD5381 Instrukcja Użytkownika Pobierz pdf (Strona 6)

6 DS563RD1

CRD5381

1.2.5 Latency or Group Delay

The system latency, or group delay, is the sum of the CS5381 group delay and the CS8421 group delay.

The latency of the CS5381 is 5 samples (5/Fs), and the latency of the CS8421 depends on input and output

sample rates, and can be found in the CS8421 data sheet [3]. Table 1 shows the combined group delay for

typical output sample rates with a fixed input sampling rate of 195.3125 kHz.

Table 1. System Latency

1.2.6 Phase Matching Between Multiple Sections

This phase delay is equal across multiple parts. Therefore, when multiple parts operate at the same Fsi and

Fso and use a common XTI/XTO clock, their output data is phase matched.

Output Sample Rate Group Delay

48 kHz 1.48 ms

96 kHz .895 ms

192 kHz .605 ms

1 2 3 4 5 6 7 8 9 10 11 ... 23 24

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Cirrus-logic CRD5381 Instrukcja Użytkownika Strona 6