Cirrus-logic CS5372A Instrukcja Użytkownika

Copyright  Cirrus Logic, Inc. 2010(All Rights Reserved)http://www.cirrus.comCS5371ACS5372ALow-power, High-performance ΔΣ ModulatorsFeatures Fourth-o

CS5371A CS5372A10 DS748F3DIGITAL CHARACTERISTICS (CONT.)Notes: 20. MCLK is generated by the digital filter. If MCLK is disabled, the device automatica

CS5371A CS5372ADS748F3 11DIGITAL CHARACTERISTICS (CONT.) MCLKMSYNCtMDATATDATA0(2.048 MHz)(512 kHz)(256 kHz)SYNCMFLAGFigure 6. System Timing Diagram

CS5371A CS5372A12 DS748F3POWER SUPPLY CHARACTERISTICS Notes: 23. All outputs unloaded. Digital inputs forced to VD or GND respectively.24. Power suppl

CS5371A CS5372ADS748F3 132. SYSTEM DIAGRAM CS5372AΔΣ ModulatorINF+INR+INF-INR-INF-INR-INF+INR+VREF+VREF-VA+VA-VDGNDMDATA1MFLAG1MDATA2MFLAG2MCLKMSYN

CS5371A CS5372A14 DS748F33. MODULATOR OPERATIONThe CS5371A and CS5372A are one- andtwo-channel, fourth-order ΔΣ modulators opti-mized for extremely hi

CS5371A CS5372ADS748F3 153.2 Decimated 24-bit OutputWhen the CS5371A and CS5372A modulatoroperates with the CS5376A digital filter, the fi-nal decimat

CS5371A CS5372A16 DS748F34. ANALOG SIGNALSThe CS5371A and CS5372A modulators havedifferential analog inputs which are separatedinto rough and fine cha

CS5371A CS5372ADS748F3 174.3 Anti-alias FilterThe modulator inputs are required to be band-width limited to ensure modulator loop stabilityand prevent

CS5371A CS5372A18 DS748F35. DIGITAL SIGNALSThe CS5371A and CS5372A modulators aredesigned to operate with the CS5376A digitalfilter. The digital filte

CS5371A CS5372ADS748F3 19The CS5371A and CS5372A MSYNC input isrising-edge triggered and resets the internalMCLK counter/divider to guarantee synchro-

CS5371A CS5372A2 DS748F3TABLE OF CONTENTS1. CHARACTERISTICS AND SPECIFICATIONS ...

CS5371A CS5372A20 DS748F36. POWER MODESThe CS5371A and CS5372A modulators havethree power modes. Normal operation, powerdown with MCLK enabled, and po

CS5371A CS5372ADS748F3 217. VOLTAGE REFERENCEThe CS5371A and CS5372A modulators re-quire a 2.500 V precision voltage reference tobe supplied to the VR

CS5371A CS5372A22 DS748F3age reference input impedance will vary withMCLK.The voltage reference external RC filter seriesresistor creates a voltage di

CS5371A CS5372ADS748F3 238. POWER SUPPLIESThe CS5371A and CS5372A modulators havea positive analog power supply pin (VA+), anegative analog power supp

CS5371A CS5372A24 DS748F38.4 SCR Latch-up ConsiderationsIt is recommended to connect the VA- powersupply to system ground (GND) with a re-verse-biased

CS5371A CS5372ADS748F3 259. PIN DESCRIPTION - CS5371APower SuppliesVA+ _ Positive Analog Power Supply, pin 8VA- _ Negative Analog Power Supply, pin 7

CS5371A CS5372A26 DS748F3VREF+ _ Positive Voltage Reference Input, pin 5Input for an external +2.500 V voltage reference relative to VREF-.VREF- _ Neg

CS5371A CS5372ADS748F3 2710. PIN DESCRIPTION - CS5372APower SuppliesVA+ _ Positive Analog Power Supply, pin 8VA- _ Negative Analog Power Supply, pin 7

CS5371A CS5372A28 DS748F3VREF+ _ Positive Voltage Reference Input, pin 5Input for an external +2.5 V voltage reference relative to VREF-.VREF- _ Negat

CS5371A CS5372ADS748F3 2911.PACKAGE DIMENSIONSNotes: 1. “D” and “E1” are reference datums and do not included mold flash or protrusions, but do inclu

CS5371A CS5372ADS748F3 3LIST OF FIGURESFigure 1. Anti-alias Filter Components...

CS5371A CS5372A30 DS748F312. ORDERING INFORMATION Model Temperature PackageCS5371A-ISZ (lead free)-40 to +85 °C 24-pin SSOPCS5372A-ISZ (lead free)

CS5371A CS5372ADS748F3 3113.ENVIRONMENTAL, MANUFACTURING, & HANDLING INFORMATION* MSL (Moisture Sensitivity Level) as specified by IPC/JEDEC J-STD

CS5371A CS5372A32 DS748F314.REVISION HISTORY Revision Date ChangesPP1 OCT 2006 Preliminary release.F1 DEC 2006 Updated to final status with most-recen

CS5371A CS5372A4 DS748F31. CHARACTERISTICS AND SPECIFICATIONS• Min / Max characteristics and specifications are guaranteed over the Specified Operatin

CS5371A CS5372ADS748F3 5TEMPERATURE CONDITIONSANALOG INPUT CHARACTERISTICS Notes: 7. Maximum integrated noise over the measurement bandwidth for the

CS5371A CS5372A6 DS748F3PERFORMANCE CHARACTERISTICSNotes: 9. Guaranteed by design and/or characterization.10. The upper bandwidth limit is determined

CS5371A CS5372ADS748F3 7PERFORMANCE CHARACTERISTICS (CONT.)Notes: 16. Specification is for the parameter over the specified temperature range and is f

CS5371A CS5372A8 DS748F3PERFORMANCE PLOTSFigure 2. Modulator Noise PerformanceFigure 3. Modulator + CS4373A Test DAC Dynamic Performance

CS5371A CS5372ADS748F3 9DIGITAL CHARACTERISTICSNotes: 19. Device is intended to be driven with CMOS logic levels. Parameter Symbol Min Typ Max UnitDi