Cirrus-logic CS4391A Instrukcja Użytkownika Pobierz pdf (Strona 9)

CS4391A

DS600PP3 9

SWITCHING CHARACTERISTICS - PCM MODES (Inputs: Logic 0 = 0 V, Logic 1 = VL)

Notes: 6. This serial clock is available only in Control Port Mode when the MCLK Divide bit is enabled.

Parameters Symbol Min Typ Max Units

Input Sample Rate Fs 4 - 200 kHz

LRCK Duty Cycle 45 50 55 %

MCLK Duty Cycle 40 50 60 %

SCLK Frequency

-MCLK/2Hz

SCLK Frequency (Note 6)

-MCLK/4Hz

SCLK rising to LRCK edge delay t

slrd

20 - - ns

SCLK rising to LRCK edge setup time t

slrs

20 - - ns

SDATA valid to SCLK rising setup time t

sdlrs

20 - - ns

SCLK rising to SDATA hold time t

sdh

20 - - ns

slrs

slrd

sdlrs

sdh

SDATA

SCLK

LRCK

Figure 1. Serial Mode Input Timing

1 2 3 4 5 6 7 8 9 10 11 12 13 14 ... 39 40

Brak uwag

Cirrus-logic CS4391A Instrukcja Użytkownika Strona 9