Cirrus-logic CS4391A Instrukcja Użytkownika Pobierz pdf (Strona 13)

CS4391A

DS600PP3 13

2. TYPICAL CONNECTION DIAGRAMS

SCLK

Audio

Data

Processor

*

External Clock

MCLK

AGND

AOUTB+

CS4391A

SDATA

VA

AOUTB-

+5V Analog

Mode

Select

M1 (SDA/

CDIN

)

M0 (AD0/CS)

AOUTA-

AOUTA+

Analog

Conditioning

&

Mute

Analog

Conditioning

&

Mute

17

19

18

14

15

16

1

3

4

5

8

9

10

M2 (SCL/CCLK)

LRCK

1.0

µ

f

+

RST

6

M3

7

12

1.0 µf

0.1 µf 1.0 µf

11

FILT+

0.1 µf

+

+

CMOUT

BMUTEC

13

AMUTEC

20

(Control Port)

*

2

VL

Logic Power

+5V to 1.8V

0.1 µf

Figure 5. Typical Connection Diagram - PCM Mode

* A high logic level for all digital inputs should not exceed VL.

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