Cirrus-logic CS2000-OTP Instrukcja Użytkownika Pobierz pdf (Strona 25)

CS2000-OTP

DS758F2 25

6.3.5 M2 Pin Configuration (M2Config[2:0])

Controls which special function is mapped to the M2 pin.

6.3.6 Clock Input Bandwidth (ClkIn_BW[2:0])

Sets the minimum loop bandwidth when locked to CLK_IN.

M2Config[2:0] M2 pin function

000 Disable CLK_OUT pin.

001 Disable AUX_OUT pin.

010 Disable CLK_OUT and AUX_OUT.

011 RModSel[1:0] Modal Parameter Enable.

100 Force Manual Fractional N Source Selection.

101 Reserved.

110 FracNSrc Modal Parameter Override

111 Force AuxOutSrc[1:0] = 10 (PLL Clock Out).

Application: “M2 Mode Pin Functionality” on page 19

ClkIn_BW[2:0] Minimum Loop Bandwidth

000 1 Hz

001 2 Hz

010 4 Hz

011 8 Hz

100 16 Hz

101 32 Hz

110 64 Hz

111 128 Hz

Application: “Adjusting the Minimum Loop Bandwidth for CLK_IN” on page 13

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Cirrus-logic CS2000-OTP Instrukcja Użytkownika Strona 25