Cirrus-logic CS3308 Instrukcja Użytkownika

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Copyright © Cirrus Logic, Inc. 2006
(All Rights Reserved)
http://www.cirrus.com
8-Channel Analog Volume Control
Features
Complete Analog Volume Control
8 Independently Controllable Channels
3 Configurable Master Volume and Muting
Controls
Wide Adjustable Volume Range
-96 dB to +22 dB in ¼ dB Steps
Low Distortion & Noise
-112 dB THD+N
123 dB Dynamic Range
Noise-Free Level Transitions
Zero-Crossing Detection with
Programmable Time-Out
Low Channel-to-Channel Crosstalk
120 dB Inter-Channel Isolation
Comprehensive Serial Control Port
Supports I²C
®
and SPI
TM
Communication
Independent Control of up to 128 Devices
on a Shared 2-Wire I²C or 3-Wire SPI
Control Bus
Supports Individual and Grouped Control of
all CS3308 Devices on the I²C or SPI
Control Bus
Standard Power Supply Voltages
±5 V Analog Supply
+3.3 V Digital Supply
Description
The CS3308 is an 8-channel digitally controlled analog
volume control designed specifically for high-end audio
systems. It features a comprehensive I²C/SPI serial
control port for easy device and volume configuration.
The CS3308 includes arrays of well-matched resistors
and complementary low-noise active output stages. A
total adjustable range of 118 dB, in ¼ dB steps, is
spread evenly over 96 dB of attenuation and 22 dB of
gain.
The CS3308 implements configurable zero-crossing
detection to provide glitch-free volume-level changes.
The I²C/SPI control interface provides for easy system
integration of up to 128 CS3308 devices over a single 2-
wire I²C or 3-wire SPI bus, allowing many channels of
volume control with minimal system controller I/O re-
quirements. Devices may be controlled on an individual
and grouped basis, simplifying simultaneous configura-
tion of a group of channels across multiple devices,
while allowing discrete control over all channels on an
individual basis.
The device operates from ±5 V analog supplies and has
an input/output voltage range of ±3.65 V. The digital
control interface operates at +3.3 V.
The CS3308 is available in a 48-pin LQFP package in
Commercial grade (-10° to 70° C). The CS3308 Cus-
tomer Demonstration board is also available for device
evaluation. Refer to “Ordering Information” on page 44
for complete details.
±5 V
+3.3 V
8-Channel
Analog
Outputs
I²C/SPI
Serial
Control
8
+
_
Zero Crossing
Detector
I²C / SPI
Control
Port
8-Channel
Analog
Inputs
8
DECEMBER '06
DS702F1
CS3308
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Strona 1 - Description

Copyright © Cirrus Logic, Inc. 2006(All Rights Reserved)http://www.cirrus.com8-Channel Analog Volume ControlFeatures Complete Analog Volume Control–

Strona 2 - TABLE OF CONTENTS

10 DS702F1CS3308CONTROL PORT SWITCHING CHARACTERISTICS - I²C FORMAT(Inputs: Logic 0 = DGND, Logic 1 = VD, CL=20pF)7. Data must be held for sufficient

Strona 3

DS702F1 11CS3308CONTROL PORT SWITCHING CHARACTERISTICS - SPI™ FORMAT(Inputs: Logic 0 = DGND, Logic 1 = VD, CL=20pF)8. Data must be held for sufficient

Strona 4 - LIST OF TABLES

12 DS702F1CS33083. TYPICAL CONNECTION DIAGRAM241403130212011REFI1REFI2REFI3REFI4REFI5REFI6REFI7REFI84843383328131813REFO1REFO2REFO3REFO4REFO5REFO6REFO

Strona 5 - 1. PIN DESCRIPTIONS

DS702F1 13CS33084. DETAILED BLOCK DIAGRAMControl Registers8ENOut36574SDA/MOSISCL/CLLKRESETMUTEAD0/CSOUT1+_1470 ~ -96 dB0 ~ +22 dB2RINROUTIN1REFI1Zero

Strona 6 - Pin Name # Pin Description

14 DS702F1CS33085. APPLICATIONS5.1 General DescriptionThe CS3308 is an 8-channel digitally controlled analog volume control designed for audio systems

Strona 7 - ABSOLUTE MAXIMUM RATINGS

DS702F1 15CS33085.2.2 Analog OutputsThe analog outputs are capable of driving 2kΩ loads to within 1.35 V of the analog supply rails and areshort-circu

Strona 8 - ANALOG CHARACTERISTICS

16 DS702F1CS33085.3.1 Recommended Power-Up Sequence1. Hold RESET low until the power supplies are stable. In this state, the control port is reset to

Strona 9 - SWITCHING CHARACTERISTICS

DS702F1 17CS33085.4 Volume & Muting Control ArchitectureThe CS3308’s volume and muting control architecture provides the ability to control each c

Strona 10

18 DS702F1CS3308Combining the multiple group addressing capabilities of the CS3308 (as detailed in section 5.8.2 onpage 24) with the internal master c

Strona 11

DS702F1 19CS33085.5 Volume ControlsThe CS3308 provides comprehensive volume control functionality, allowing each channel’s volume to bechanged on an i

Strona 12 - 3. TYPICAL CONNECTION DIAGRAM

2 DS702F1CS3308TABLE OF CONTENTS1. PIN DESCRIPTIONS ...

Strona 13 - 4. DETAILED BLOCK DIAGRAM

20 DS702F1CS3308Table 1 shows example volume settings using individual and master volume controls.Refer to Figure 6 on page 18 for a graphical represe

Strona 14 - 5. APPLICATIONS

DS702F1 21CS33085.6 Muting ControlsThe CS3308 provides flexible muting capabilities to complement its comprehensive volume control abilities.Each chan

Strona 15 - 5.3 Power-Up and Power-Down

22 DS702F1CS33085.7 Zero-Crossing DetectionThe CS3308 incorporates comprehensive zero-crossing detection features to provide for noise-free leveltrans

Strona 16

DS702F1 23CS33085.8 System Serial Control ConfigurationThe CS3308 includes a comprehensive serial control port which supports both SPI and I²C modes o

Strona 17 - 5.4.1 Control Mapping Matrix

24 DS702F1CS33085.8.2 Serial Control within a Multiple-CS3308 SystemThe CS3308 allows both independent and simultaneous control of up to 128 devices o

Strona 18

DS702F1 25CS3308input of device N+1 may be repeated for up to 128 devices per single CS signal. If more than 128 devicesare required in a system, sepa

Strona 19 - 5.5 Volume Controls

26 DS702F1CS3308Once this configuration process is complete, every device may be independently controlled with a standardSPI communication cycle using

Strona 20 - 5.5.3 Volume Limits

DS702F1 27CS33085.9 I²C/SPI Serial Control FormatsThe control port is used to access the internal registers of the CS3308. The control port has 2 mode

Strona 21 - 5.6.3 Hardware Mute Control

28 DS702F1CS3308Since the read operation cannot set the MAP, an aborted write operation is used as a preamble. As shownin Figure 13, the write operati

Strona 22 - 5.7.2 Zero-Crossing Time-Out

DS702F1 29CS33086. CS3308 REGISTER QUICK REFERENCEThis table shows the register names and their associated default values.Addr Function 7 6 5 4 3 2 1

Strona 23

DS702F1 3CS33087.4.2 MUTE Input Polarity (Bit 4) ... 337

Strona 24

30 DS702F1CS330810h Master 1 MaskM1_Ch8M M1_Ch7M M1_Ch6M M1_Ch5M M1_Ch4M M1_Ch3M M1_Ch2M M1_Ch1Mpage 36 111 1 111111h Master 1 Vol-umeM1_Vol7 M1_Vol6

Strona 25

DS702F1 31CS33087. CS3308 REGISTER DESCRIPTIONSNotes:1. When addressing the CS3308 with the Individual Chip Address, all registers are read/write in I

Strona 26

32 DS702F1CS33087.2 ¼ dB Control - Address 09h7.2.1 ¼ dB Control (Bit 0 - 7)Default = 0Function:When set, ¼ dB of gain will be added to each bit’s res

Strona 27 - 5.9.1 I²C Mode

DS702F1 33CS33087.3 Mute Control - Address 0Ah7.3.1 Mute Channel X (Bit 0 - 7)Default = 0Function:Each bit controls the individual mute state of its r

Strona 28 - 5.9.2 SPI Mode

34 DS702F1CS33087.4.3 Channel B = Channel A (Bit 0 - 3)Default = 0Function:When this bit is set, Channel A and Channel B volume levels and muting cond

Strona 29 - Addr Function 7 6 5 4 3 2 1 0

DS702F1 35CS33087.5.2 Zero-Crossing Mode (Bits 1:0)Default = 01Function:These bits control the Zero-Crossing detection mode as shown in Table 9. Refer

Strona 30 - 30 DS702F1

36 DS702F1CS33087.8 Freeze Control - Address 0Fh7.8.1 Freeze (Bit 7)Default = 0Function:When the Freeze bit is set, the Freeze function allows modific

Strona 31

DS702F1 37CS33087.11 Master 1 Control - Address 12h7.11.1 Master 1 Mute (Bit 1)Default = 0Function:This bit controls the Master 1 mute state. When set

Strona 32

38 DS702F1CS3308In the equation above, “Desired Volume Setting in dB” is determined by rounding the desired ¼ dBresolution volume setting down to ½ dB

Strona 33

DS702F1 39CS3308as dictated by the ZCMode[1:0] and TimeOut[2:0] bits in the Device Config 2 register (see “DeviceConfiguration 2 - Address 0Ch” on pag

Strona 34

4 DS702F1CS3308LIST OF FIGURESFigure 1.Control Port Timing - I²C Format...

Strona 35 - 7.7.1 Power Down All (Bit 0)

40 DS702F1CS33087.18 Group 2 Chip Address 19h7.18.1 Group 2 Chip Address (Bits 7:1)SPI Mode Default = 1000000bI²C Mode Default = See Table 4 on page 2

Strona 36 - 7.8.1 Freeze (Bit 7)

DS702F1 41CS33087.20 Individual Chip Address 1Bh7.20.1 Individual Chip Address (Bits 7:1)SPI Mode Default = 1000000bI²C Mode Default = See Table 4 on

Strona 37

42 DS702F1CS33088. PARAMETER DEFINITIONSDynamic RangeFull-scale (RMS) signal to broadband noise ratio. The broadband noise is measured over the specif

Strona 38

DS702F1 43CS33089. PACKAGE DIMENSIONS10.THERMAL CHARACTERISTICS AND SPECIFICATIONS 1. θJA is specified according to JEDEC specifications for multi-la

Strona 39 - 7.17.1 Master 3 Mute (Bit 1)

44 DS702F1CS330811.ORDERING INFORMATION12.REVISION HISTORYProduct Description Package Pb-Free Grade Temp Range Container Order #CS33088-ChannelAnalog

Strona 40

DS702F1 5CS33081. PIN DESCRIPTIONSPin Name # Pin DescriptionIN1IN2IN3IN4IN5IN6IN7IN8142393229221912Analog Inputs (Input) - The full-scale level is spe

Strona 41

6 DS702F1CS3308OUT1OUT2OUT3OUT4OUT5OUT6OUT7OUT84744373427241714Analog Outputs (Output) - The full-scale output level is specified in the Analog Charac

Strona 42 - 8. PARAMETER DEFINITIONS

DS702F1 7CS33082. CHARACTERISTICS AND SPECIFICATIONSAll Min/Max characteristics and specifications are guaranteed over the Specified Operating Conditi

Strona 43 - 48L LQFP PACKAGE DRAWING

8 DS702F1CS3308ANALOG CHARACTERISTICS(Test conditions (unless otherwise specified): RS=0; RL=2kΩ; CL= 20 pF; 10 Hz to 20 kHz Measurement Band-width)3.

Strona 44 - 12.REVISION HISTORY

DS702F1 9CS3308DIGITAL INTERFACE CHARACTERISTICSMUTE SWITCHING CHARACTERISTICS(Inputs: Logic 0 = DGND, Logic 1 = VD)6. The MUTE active state (low/high

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