Cirrus-logic CDB42L52 Instrukcja Użytkownika Pobierz pdf (Strona 16)

16 DS680DB1

CDB42L52

CDB42L51 BLOCK DIAGRAM

Figure 7. Block Diagram

Analog Inputs

Software Mode

Control Port

CS42L52

S/PDIF I/O

(CS8406 + CS8416)

Clocks/Data

Header

I²C/SPI Header

FPGA

Oscillator

(socket)

Reset

Reset

Reset

Reset

Clk/Data SRC

Frequency

Synthesizer PLL

Analog Outputs

Speaker Outputs

MCLK

Figure 8 on page 17

Figure 10 on page 19

Figure 9 on

page 18

Figure 10

on page 19

Figure 8 on page 17

Figure 8 on page 17

Figure 9 on page 18

Figure 9 on

page 18

Figure 10 on page 19

Figure 8 on page 17

Figure 8 on page 17

Figure 9 on page 18

Figure 8 on page 17

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