Cirrus-logic CDB42L55 Instrukcja Użytkownika

Copyright © Cirrus Logic, Inc. 2008(All Rights Reserved)http://www.cirrus.comEvaluation Board for CS42L55Features Line-level Analog Inputs– 4 RCA Inp

10 DS773DB1CDB42L554 SOFTWARE MODE CONTROLThe CDB42L55 may be used with the Microsoft Windows®-based FlexGUI graphical user interface, allowing soft-w

DS773DB1 11CDB42L554.1 Board Configuration TabThe “Board Configuration” tab provides high-level control of signal routing on the CDB42L55. The control

12 DS773DB1CDB42L554.2 CODEC Configuration TabThe “CODEC Configuration” tab provides high-level control of the CS42L55 register settings. Status text

DS773DB1 13CDB42L554.3 Analog Input Volume TabThe “Analog Input Volume” tab provides high-level control of all volume settings in the ADC of the CS42L

14 DS773DB1CDB42L554.4 DSP Engine TabThe “DSP Engine” tab provides high-level control functions to modify the SDIN (PCM) data volume level,the ADC out

DS773DB1 15CDB42L554.5 Analog Output Volume TabThe “Analog Output Volume” tab provides high-level control of the CS42L55 Class H output amplifier,HP/L

16 DS773DB1CDB42L554.6 Register Maps TabThe Register Maps tabs provide low-level control of the CS42L55, CS8416, CS8406, CS8421, FPGA andGPIO register

DS773DB1 17CDB42L555 SYSTEM CONNECTIONS AND JUMPERS CONNECTOR REF INPUT/OUTPUT SIGNAL PRESENTEXT. +5V TP9 Input +5V power supplyGND TP10 Input GND

18 DS773DB1CDB42L55 JMP LABEL PURPOSE POSITION FUNCTION SELECTEDJ31 VLSelects source of voltage for the VL supply*+1.8V Voltage source is +1.8 V regul

DS773DB1 19CDB42L556 PERFORMANCE PLOTSTest conditions (unless otherwise specified): TA= 25°C; VA=VCP=VLDO=VL=1.8 V; input test signal is a full-scale9

2 DS773DB1CDB42L55TABLE OF CONTENTS1. QUICK START GUIDE ...

20 DS773DB1CDB42L55-140+0-120-100-80-60-40-20dBFS20 20k50 100 200 500 1k 2k 5k 10kHzFigure 14. FFT - Analog In to Digital Out - no input Figure 15.

DS773DB1 21CDB42L55-120-60-115-110-105-100-95-90-85-80-75-70-65dBr A-50 +0-40 -30 -20 -10dBr AFigure 20. THD+N vs. Volume - Digital In to HP OutFigur

22 DS773DB1CDB42L55-100-60-95-90-85-80-75-70-65dBr A20 20k50 100 200 500 1k 2k 5k 10kHzFigure 26. FFT Crosstalk - Digital In to HP Out @ 0 dBFS Figur

DS773DB1 23CDB42L55-140+0-120-100-80-60-40-20dBr A20 20k50 100 200 500 1k 2k 5k 10kHzFigure 32. FFT - Digital In to Line Out - no input Figure 33. F

24 DS773DB1CDB42L557 CDB42L55 BLOCK DIAGRAM Figure 36. Block DiagramUSBSerialPC Control Board PowerExternal 5.0 V SupplyLDO’sBuck(not included)1.8 V2

DS773DB1 25CDB42L558 CDB42L55 SCHEMATICSFigure 37. CS42L55 & Analog I/O (Schematic Sheet 1)

26 DS773DB1CDB42L55Figure 38. S/PDIF & Digital Interface (Schematic Sheet 2)

DS773DB1 27CDB42L55Figure 39. PLL, oscillator and external I/O connections (Schematic Sheet 3)

28 DS773DB1CDB42L55Figure 40. Microcontroller and FPGA (Schematic Sheet 4)

DS773DB1 29CDB42L55Figure 41. Power (Schematic Sheet 5)

DS773DB1 3CDB42L55LIST OF FIGURESFigure 1.Quick Start Board Layout ...

30 DS773DB1CDB42L559 CDB42L55 LAYOUTFigure 42. Silk Screen

DS773DB1 31CDB42L55Figure 43. Top-Side Layer

32 DS773DB1CDB42L55Figure 44. GND (Layer 2)

DS773DB1 33CDB42L55Figure 45. Power (Layer 3)

34 DS773DB1CDB42L55Figure 46. Bottom Side Layer

DS773DB1 35CDB42L5510 REVISION HISTORY Revision ChangesDB1 Initial Release

36 DS773DB1CDB42L55 Contacting Cirrus Logic SupportFor all product questions and inquiries, contact a Cirrus Logic Sales Representative. To find the o

4 DS773DB1CDB42L551 QUICK START GUIDEThe following figure is a simplified quick-start guide made for user convenience. The guide configures the board

DS773DB1 5CDB42L552 SYSTEM OVERVIEWThe CDB42L55 evaluation platform provides analog and digital interfaces to the CS42L55 and allows for externalDSP a

6 DS773DB1CDB42L55Configuration of the CS8416 is made using controls in the “Board Configuration” tab of the Cirrus FlexGUIsoftware. Section 3 “Config

DS773DB1 7CDB42L552.6 OscillatorThe socketed on-board oscillator can be selected as the system master clock source by using the selectionson the “Boar

8 DS773DB1CDB42L553 CONFIGURATION OPTIONSThis section highlights two common configurations for the CDB42L55. It provides a basic understanding of how

DS773DB1 9CDB42L553.2 Analog In to S/PDIF or PSIA Out The CS42L55 analog front-end performance can be tested by selecting the “SPDIF In to Analog Out