Cirrus-logic CRD42L52 Instrukcja Użytkownika Pobierz pdf (Strona 2)

2 DS680RD1

CRD42L52

TABLE OF CONTENTS

1. SYSTEM OVERVIEW ............................................................................................................................. 4

1.1 Power (U2) ....................................................................................................................................... 4

1.2 Microcontroller (U3) ......................................................................................................................... 4

1.3 CS8416 Digital Audio Receiver (U7) ................................................................................................ 4

1.4 CS8406 Digital Audio Transmitter (U8) ............................................................................................ 4

1.5 Oscillator (Y1) .................................................................................................................................. 5

1.6 CS42L52 Audio CODEC (U1) .......................................................................................................... 5

1.7 Analog Input ..................................................................................................................................... 5

1.8 Analog Outputs ................................................................................................................................ 5

1.9 Layout .............................................................................................................................................. 5

2. QUICK-START GUIDE ........................................................................................................................... 6

3. CONFIGURATION OPTIONS ................................................................................................................. 7

3.1 S/PDIF In to Headphone Out ........................................................................................................... 7

3.2 Line In to S/PDIF Out ....................................................................................................................... 7

3.3 S/PDIF In to Speaker Out ................................................................................................................ 8

3.4 Analog In to Analog Out - Digital Loopback ..................................................................................... 8

4. SOFTWARE MODE CONTROL ............................................................................................................. 9

4.1 CODEC Configuration Tab ............................................................................................................ 10

4.2 Analog Input Volume Tab .............................................................................................................. 11

4.3 DSP Engine Tab ............................................................................................................................ 12

4.4 Analog and PWM Output Volume Tab ...........................................................................................13

4.5 Register Maps Tab ......................................................................................................................... 14

5. PERFORMANCE PLOTS ..................................................................................................................... 15

6. SYSTEM CONNECTIONS & INTERFACE ........................................................................................... 18

CRD42L52 AND CDB42LDB1 BLOCK DIAGRAM .............................................................................. 19

7. CRD42L52 SCHEMATICS ................................................................................................................... 20

8. CDB42LDB1 SCHEMATICS ................................................................................................................ 21

9. CRD42L52 LAYOUT ............................................................................................................................ 23

10. CDB42LDB1 LAYOUT ....................................................................................................................... 24

11. REVISION HISTORY .......................................................................................................................... 27

1 2 3 4 5 6 7 ... 27 28

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