Cirrus-logic CS8415A Instrukcja Użytkownika Strona 29
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- Features 1
- General Description 1
- CDB8415A 2
- TABLE OF CONTENTS 3
- LIST OF FIGURES 5
- LIST OF TABLES 5
- ABSOLUTE MAXIMUM RATINGS 6
- DIGITAL INPUT CHARACTERISTICS 7
- SWITCHING CHARACTERISTICS 7
- - - 100 kHz 10
- 2. TYPICAL CONNECTION DIAGRAM 11
- 3. GENERAL DESCRIPTION 12
- 4. SERIAL AUDIO OUTPUT PORT 13
- Frame 191 14
- 5. AES3 RECEIVER 15
- 5.7 Non-Audio Auto-Detection 16
- 5.6 User Data Handling 16
- 5.8 Mono Mode Operation 17
- 6.2 I²C Mode 19
- 6.3 Interrupts 19
- 8.1 Control 1 (01h) 21
- 8.2 Control 2 (02h) 21
- 7 6543210 22
- 0RUN000000 22
- 0 OSLIP 0 0 0 DETC 0 RERR 23
- 8.7 Interrupt 1 Mask (09h) 24
- 8.9 Interrupt 2 Mask (0Ch) 24
- 0 0 0 0 DETU1 0 QCH1 0 25
- 0 0 0 0 DETU0 0 QCH0 0 25
- 76543210 26
- 0 0 BSEL CBMR DETCI 0 CAM CHS 27
- DS470F4 29 29
- 10.HARDWARE MODE 32
- 12. APPLICATIONS 35
- COMPONENTS 36
- MANAGEMENT 38
- D to E interrupt occurs 39
- Optionally set D to E inhibit 39
- Read E data 39
- If set, clear D to E inhibit 39
- 14.2.3.2 Two-Byte Mode 40
- 15.APPENDIX C: PLL FILTER 41
- 15.2.1 General 42
- 15.2.2 Capacitor Selection 42
- 15.2.3 Circuit Board Layout 42
- 15.3.2 External Components 43
- 15.3.3 Jitter Tolerance 44
- 15.3.4 Jitter Attenuation 45
- 16.REVISION HISTORY 46
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