Cirrus-logic CS4391 Instrukcja Użytkownika

Preliminary Product InformationThis document contains information for a new product.Cirrus Logic reserves the right to modify this product without not

CS439110 DS335PP4SWITCHING CHARACTERISTICS - I2C CONTROL PORT (TA = 25° C; VL = 5.5 to 1.8 Volts; Inputs: logic 0 = AGND, logic 1 = VL, CL = 30 pF)No

CS4391DS335PP4 11SWITCHING CHARACTERISTICS - SPI CONTROL PORT (TA = 25° C; VL = 5.5 to 1.8 Volts; Inputs: logic 0 = AGND, logic 1 = VL, CL = 30 pF)No

CS439112 DS335PP42. TYPICAL CONNECTION DIAGRAMSSCLKAudioDataProcessor*External ClockMCLKAGNDAOUTB+CS4391SDATAVAAOUTB-+5V to +3VAnalogModeSelectM1 (SDA

CS4391DS335PP4 13DSD_BAudioDataProcessor*External ClockMCLKAGNDAOUTB+CS4391DSD_AVAAOUTB-+5V to +3VAnalogModeSelectM1 (SDA/CDIN)M0 (AD0/CS)AOUTA-AOUTA+

CS439114 DS335PP43. REGISTER QUICK REFERENCE** “default” ==> bit status after power-up-sequence or reset**3.1 MODE CONTROL 1 (ADDRESS 01H)AMUTE (Au

CS4391DS335PP4 153.2 VOLUME AND MIXING CONTROL (ADDRESS 02H)A = B (Channel A Volume = Channel B Volume)Default = ‘0’.0 - AOUTA volume is determined by

CS439116 DS335PP43.5 MODE CONTROL 2 (ADDRESS 05H)INVERT_A (Invert Channel A)Default = ‘0’.0 - Disabled1 - EnabledINVERT_B (Invert Channel B)Default =

CS4391DS335PP4 174. REGISTER DESCRIPTION** All register access is R/W in I2C mode and write only in SPI mode **4.1 MODE CONTROL 1 - ADDRESS 01H4.1.1 A

CS439118 DS335PP44.2 VOLUME AND MIXING CONTROL (ADDRESS 02H)4.2.1 Channel A Volume = Channel B Volume (Bit 7)Function:The AOUTA and AOUTB volume level

CS4391DS335PP4 194.4 CHANNEL B VOLUME CONTROL - ADDRESS 04H4.4.1 Mute (Bit 7)Function:The Digital-to-Analog converter output will mute when enabled. T

CS43912 DS335PP4TABLE OF CONTENTS1. CHARACTERISTICS/SPECIFICATIONS ... 5ANALOG

CS439120 DS335PP44.5.5 Freeze (Bit 2)Function:This function allows modifications to the registers without the changes being taking effect until Freeze

CS4391DS335PP4 215. PIN DESCRIPTION - PCM DATA MODEReset - RSTPin 1, InputFunction:Hardware Mode: The device enters a low power mode and the internal

CS439122 DS335PP4Serial Clock - SCLKPin 4, InputFunction:Clocks the individual bits of the serial data into the SDATA pin. The required relationship b

CS4391DS335PP4 23Serial Control Interface Clock - SCL/CCLK (Control Port Mode)Pin 8, InputFunction:Clocks the serial control data into or from SDA/CD

CS439124 DS335PP4Differential Analog Output - AOUTB+, AOUTB- and AOUTA+, AOUTA-Pins 14, 15 and 18, 19, OutputsFunction:The full scale differential ana

CS4391DS335PP4 256. PIN DESCRIPTION - DSD MODEDSD Audio Data - DSD_A and DSD_BPins 3 and 4, InputsFunction:Direct Stream Digital audio data is clocked

CS439126 DS335PP4 DIF2 DIF1 DIFO DESCRIPTION0 0 0 Left Justified, up to 24-bit data001I2S, up to 24-bit data0 1 0 Right Justified, 16-bit

CS4391DS335PP4 27 ATAPI4 ATAPI3 ATAPI2 ATAPI1 ATAPI0 AOUTA AOUTB00000 MUTE MUTE00001 MUTE bR00010 MUTE bL00011 MUTE b[(L+R)/2]00100 aR MUTE00101 aR bR

CS439128 DS335PP4Note:These clocking ratios are only available inControl Port Mode when the MCLK Divide bit is enabled. Sample Rate(kHz)MCLK (MH

CS4391DS335PP4 29M3 M2 M1 M0 DESCRIPTION FORMAT FIGURE1100Left Justified up to 24-bit data071101I2S up to 24-bit data181110Right Justified 16-bit data

CS4391DS335PP4 3Serial Audio Data - SDATA ...21Serial Clock -

CS439130 DS335PP4 Figure 7. Format 0, Left Justified up to 24-Bit DataLRCKSCLKLeft ChannelRight ChannelSDATA +3 +2 +1

CS4391DS335PP4 31LRCKSCLKLeft ChannelRight ChannelSDATA654321098715 14 13 12 11 1010 654321098715 14 13 12 11 1017 16 17 1632 clocks19 18 19 18Figure

CS439132 DS335PP47. APPLICATIONS7.1 Recommended Power-up Sequence for Hardware Mode1) Hold RST low until the power supplies, master,and left/right clo

CS4391DS335PP4 338. CONTROL PORT INTERFACEThe control port is used to load all the internal set-tings of the CS4391. The operation of the controlport

CS439134 DS335PP4 76543210INCR Reserved Reserved Reserved Reserved MAP2 MAP1 MAP000000000INCR (Auto MAP Increment Enable)Default = ‘0’.0 - Di

CS4391DS335PP4 35-0.25-0.2-0.15-0.1-0.0500.050.10.150.20.250 0.05 0.1 0.15 0.2 0.25 0.3 0.35 0.4 0.45 0.5Frequency (normalized to Fs)Amplitude dBFigur

CS439136 DS335PP4Figure 24. Double-Speed Transition Band Figure 25. Double-Speed Stopband Rejection

CS4391DS335PP4 379. PARAMETER DEFINITIONSTotal Harmonic Distortion + Noise (THD+N)The ratio of the rms value of the signal to the rms sum of all other

CS439138 DS335PP411.PACKAGE DIMENSIONS Notes: 1. “D” and “E1” are reference datums and do not included mold flash or protrusions, but do include mo

CS43914 DS335PP4LIST OF TABLESFigure:1. Digital Interface Formats - PCM Modes ...

CS4391DS335PP4 51. CHARACTERISTICS/SPECIFICATIONSANALOG CHARACTERISTICS (TA = 25° C; Logic "1" = VL = VA; Logic "0" = AGND; Full-

CS43916 DS335PP4ANALOG CHARACTERISTICS (continued) Notes: 17. Triangular PDF dithered data.18. THD+N specifications for 48 kHz sample rates are made

CS4391DS335PP4 7DIGITAL CHARACTERISTICS (TA = 25° C)ABSOLUTE MAXIMUM RATINGS (AGND = 0 V; all voltages with respect to ground.)WARNING: Operation at o

CS43918 DS335PP4SWITCHING CHARACTERISTICS - PCM MODES (TA = -10 to 70° C; VL = 5.5 to 1.8 Volts; Inputs: Logic 0 = 0 V, Logic 1 = VL, CL = 20 pF) Not

CS4391DS335PP4 9SWITCHING CHARACTERISTICS - DSD (TA= -10 to 70° C; Logic 0 = AGND = DGND; Logic 1 = VL = 5.5 to 1.8 Volts; CL=20pF) Parameter Symbol M