Cirrus-logic CS2200-OTP Instrukcja Użytkownika Strona 3

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CS2200-OTP
DS842F2 3
Figure 2. Delta-Sigma Fractional-N Frequency Synthesizer .......................................................................8
Figure 3. Internal Timing Reference Clock Divider ..................................................................................... 9
Figure 4. REF_CLK Frequency vs. a Fixed CLK_OUT ............................................................................. 10
Figure 5. External Component Requirements for Crystal Circuit .............................................................. 10
Figure 6. Ratio Feature Summary ............................................................................................................. 12
Figure 7. PLL Clock Output Options ......................................................................................................... 13
Figure 8. Auxiliary Output Selection .......................................................................................................... 14
Figure 9. M2 Mapping Options .................................................................................................................. 15
Figure 10. Parameter Configuration Sets .................................................................................................. 17
LIST OF TABLES
Table 1. Modal and Global Configuration .................................................................................................... 9
Table 2. Ratio Modifier .............................................................................................................................. 11
Table 3. Example 12.20 R-Values ............................................................................................................ 20
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