Copyright © Cirrus Logic, Inc. 2008(All Rights Reserved)http://www.cirrus.comEvaluation Board for the CS43L21Features MUX’d Analog Output– Stereo RCA
10 DS723DB1CDB43L212.3 Register Maps TabThe Advanced Register Debug tab provides low-level control of the CS43L21 individual register settings.Registe
DS723DB1 11CDB43L213. HARDWARE MODE CONTROLThe CDB may be configured without the use of a software control port through the use of two switches, “FPGA
12 DS723DB1CDB43L21OscillatorMCLKLRCK/SCLKSDINCS43L21I/O HeaderMCLKLRCK/SCLKSDINCS8415RMCK(256Fs)OLRCK/OSCLKSDOUT(LJ)OscillatorMCLKLRCK/SCLKSDINCS43L2
DS723DB1 13CDB43L21Figure 8. Routing 5MCLKLRCK/SCLKSDINCS43L21I/O HeaderMCLKLRCK/SCLKSDINCS8415RMCK(256Fs)OLRCK/OSCLKSDOUT(LJ)Oscillator
14 DS723DB1CDB43L214. SYSTEM CONNECTIONS 5. JUMPER SETTINGSCONNECTOR REF INPUT/OUTPUT SIGNAL PRESENT+5V J26 Input +5.0 V Power SupplyGND J27 Input G
DS723DB1 15CDB43L216. CDB43L21 BLOCK DIAGRAM Figure 9. Block DiagramAnalog Output(Line + Headphone)Software Mode Control Port CS43L21S/PDIF Input (CS
16 DS723DB1CDB43L217. CS43L21 SCHEMATICSFigure 10. CS43L21 and Analog I/O (Schematic Sheet 1)
DS723DB1 17CDB43L21 Figure 11. S/PDIF I/O (Schematic Sheet 2)
18 DS723DB1CDB43L21Figure 12. FPGA (Schematic Sheet 3)
DS723DB1 19CDB43L21Figure 13. Level Shifters & I/O Stake Header (Schematic Sheet 4)
2 DS723DB1CDB43L21TABLE OF CONTENTS1. SYSTEM OVERVIEW ...
20 DS723DB1CDB43L21Figure 14. Control Port I/O (Schematic Sheet 5)
DS723DB1 21CDB43L21Figure 15. Power (Schematic Sheet 6)
22 DS723DB1CDB43L218. CDB43L21 LAYOUTFigure 16. Silk ScreenCDB43L21CS43L21CS43L21CS43L21
DS723DB1 23CDB43L21Figure 17. Top-Side Layer
24 DS723DB1CDB43L21Figure 18. Bottom-Side Layer
DS723DB1 25CDB43L219. ERRATAThe CDB43L21 currently does not support the +1.8 V and +2.5 V power supply options on header J31 (VL). Thisheader must be
DS723DB1 3CDB43L219. ERRATA ...
4 DS723DB1CDB43L211. SYSTEM OVERVIEW The CDB43L21 evaluation board is an excellent means for evaluating the CS43L21. Digital audio signal interfacesar
DS723DB1 5CDB43L21Section 2. “Software Mode Control” on page 7 and Section 3. “Hardware Mode Control” on page 11 provideconfiguration details.1.5 CS84
6 DS723DB1CDB43L211.9 Stand-Alone Switches The “FPGA H/W Control” and “CS43L21 H/W Control” switches control all Hardware Mode options.Section 3. “Har
DS723DB1 7CDB43L212. SOFTWARE MODE CONTROLThe CDB43L21 may be used with the Microsoft® Windows-based FlexGUI graphical user interface, allowing soft-w
8 DS723DB1CDB43L212.1 General Configuration TabThe “General Configuration” tab provides high-level control of signal routing on the CDB43L21. This tab
DS723DB1 9CDB43L212.2 DAC Volume Controls TabThe “DAC Volume Controls” tab provides high-level control of all volume settings in the CS43L21. Statuste
Komentarze do niniejszej Instrukcji