Cirrus-logic CS4970x4 Instrukcja Użytkownika Pobierz pdf (Strona 152)

List of Questions and Answers

CS4953x4/CS4970x4 System Designer’s Guide

5. Click on ‘Generate Deliverables’ in the ‘Tools’ menu for each of the .cpa files opened. All the

generated deliverables must be saved under one parent directory. For example:

C:\CirrusDSP\DSPCondenser\projects\sample_cirrus\deliverables.

Refer to the DSP Composer manual for more details. Also, refer to Section 8.6.1.1, "Best Practices" on

page 8-17 on suggested directory structure.

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CS4953x4/CS4970x4 1
Contents 3
P.2.1 Chip Features 13
CS4953x4 14
P.4 Firmware Overview 17
P.4.2 DSP Condenser 18
P.5.1 Power and Ground 18
P.5.2 PLL Filter 19
P.5.3 Clocking 20
P.5.4 Control 21
P.6 CS4970x4 Pin Assignments 22
CS4970x4 Pin Assignments 23
P.7 CS4953x4 Pin Assignments 30
CS4953x4 Pin Assignments 31
Chapter 1 39
Operational Modes 39
1.1 Overview 39
Operational Mode Selection 40
Table 1-1. Operation Modes 40
1.3.1.1 Master Boot Protocol 45
SPI Port 48
2.4.2 SPI Bus Dynamics 49
2.4.3 SPI Messaging 50
2.4.3.2 SPI Write Protocol 51
2.4.3.4 SPI Read Protocol 52
2.4.3.5 SCP1_IRQ Behavior 55
2.5.1 I 56
C System Bus Description 56
2.5.2 I 57
C Bus Dynamics 57
I2C Port 58
Figure 2-10. I 58
C Address with ACK and NACK 58
Figure 2-14. I 61
C Write Flow Diagram 61
Figure 2-15. I 63
C Read Flow Diagram 63
M S S M S M S M S M M 65
3.2.1 DAI Pin Description 67
3.2.3 BDI Port 69
3.2.4 Digital Audio Formats 69
DAI Hardware Configuration 70
3.4.1 DSD Pin Description 73
4.2.1 DAO Pin Description 75
Figure 4-2. I 77
4.2.6 S/PDIF Transmitter 83
SDRAM Controller 86
S, HCLK = 10 MHz 89
S*150MHz)/16 = 146.44 = 0x93 89
6.1.1.1 SPDIF Clocking 92
6.1.2.1 HDMI Clocking 92
7.2.1 Firmware Modules 94
7.2.2 Overlay Architecture 94
Firmware Messaging 95
7.3 Firmware Messaging 95
7.4.2 DSP_CFG_xxx Registers 100
7.4.3 Status Registers 105
Legacy API Still in Use 106
7.5 Legacy API Still in Use 106
Index Variable Description 107
7.6.1 Overview 109
OS Firmware Module 110
Overview 111
Development Flow 112
8.2 Development Flow 112
Elements of a Project 114
8.3 Elements of a Project 114
Creating a Flash Image 125
8.5 Creating a Flash Image 125
Using DSP Condenser 127
8.6 Using DSP Condenser 127
8.7 Creating a Flash Image 130
Figure 8-19. CDM Window 134
Host Activity 138
8.9 Host Activity 138
9.1.1 Usage 140
Figure 9-4. Run Runtime GUI 141
Runtime GUI Current Project 142
Figure 9-7. Connection Group 142
Figure 9-8. Command Group 143
Figure 9-9. DSP Status Group 144
Introduction 150
List of Questions and Answers 151
C.1.1 DTS 96/24 154
and DTS-ES 154
Revision History 162

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