Cirrus-logic AN372 Instrukcja Użytkownika Strona 1

Copyright  Cirrus Logic, Inc. 2012(All Rights Reserved)Cirrus Logic, Inc.http://www.cirrus.comApplication NoteDesign Guide for a CS1612 and CS1613Dim

AN37210 AN372REV1Step 2) Select a Value for Boost Output VoltageThe value of the boost output voltage, VBST, must be greater than the maximum input A

AN372AN372REV1 11For optimum efficiency, the increase in conduction losses (created by an uneven duty cycle) must balance the reduction of the losses

AN37212 AN372REV1current flows in the load circuit, dilutes the energy delivered during time T1 and T2 resulting in lower average power to the load.Di

AN372AN372REV1 13Initially, T3 is assumed to be zero. After the circuit is built, the oscillation period can be measured, and the circuit parameters c

AN37214 AN372REV1Step 9) Calculate the Buck Inductance (as Measured Across the N+1 Turns)Step 10) Calculate RFBGAIN (R17)Use Equation 16 to calculate

AN372AN372REV1 15Step 14) Circuit AdjustmentsCircuit adjustments are required after the inductor has been designed and constructed. Recalculate resist

AN37216 AN372REV1Notes on Circuit Fine Tuning• Going beyond the RFBGAIN limitation will not have any further effect on the design.• RSense and RFBGAIN

AN372AN372REV1 173.4 Boost Stage DesignThe design process for the boost stage is outlined below:1. Determine IPK(BST) and a tentative resistor value,

AN37218 AN372REV1The AC line current does not follow the inductor peak current envelope because the circuit operates in CRM and DCM. The switching fre

AN372AN372REV1 19The frequency range should be as high as possible without exceeding 75kHz. This strategy will keep the fundamental and second harmoni

AN3722 AN372REV1Contacting Cirrus Logic SupportFor all product questions and inquiries contact a Cirrus Logic Sales Representative. To find the one ne

AN37220 AN372REV1Step 19) Determine Boost Input CapacitorTo be compatible with a wide range of dimmers, the boost input capacitance should be minimize

AN372AN372REV1 21The BSTAUX pin and FBAUX pin currents must be limited to less than 1mA. A series resistor of at least 22 k must be used to limit the

AN37222 AN372REV1Solving Equation 29 for CODE:The tracking range of this resistance ADC is approximately 15.5k to 4M. The series resistor RS is used

AN372AN372REV1 23Step 25) Clamp CircuitTo keep dimmers conducting and prevent misfiring, a minimum power needs to be delivered from the dimmer to the

AN37224 AN372REV14 Design ExampleThe required operating parameters for the analytical process are outlined in the table below.4.1 Buck Design StepsA s

AN372AN372REV1 25The maximum FET voltage is calculated using Equation 38:whereVD3 = Forward voltage across catch diode D3.Examining the result reveals

AN37226 AN372REV1For practical winding reasons an integer turns ratio is preferred giving the option of multifilar winding taking advantage of tight c

AN372AN372REV1 27Choosing a 6.49Ω standard value will assure margin against resistor tolerance. To prevent false triggering by the comparator, pin FBS

AN37228 AN372REV1Step 13) Buck Inductor SpecificationSpecifications for the buck inductor L4 can now be compiled to enable suppliers to design within

AN372AN372REV1 29Boost inductor RMS current IRMS depends on the AC line RMS current, the triangular shape, and the stepped envelope. As a first approx

AN372AN372REV1 32 IntroductionThis application note provides a guide to designing a Solid State Lighting (SSL) LED lamp circuit using Cirrus Logic&apo

AN37230 AN372REV1The negative voltage on the auxiliary winding is calculated using Equation 67:The recommended current into pin FBAUX is limited to 1m

AN372AN372REV1 31action. At 125°C the thermistor has 2.5k plus resistor R18 = 14k present a resistance of 16.5k at pin eOTP, reaching the point at

AN37232 AN372REV1Revision HistoryRevision Date ChangesREV1 AUG 2012 Initial Release.

AN3724 AN372REV13 Design ProcessThe design process for a two-stage power converter system can be partitioned into six circuit blocks (see Figure 1). T

AN372AN372REV1 53.2 Overview of Design StepsThe CS1612/13 LED driver IC controls a power converter system that has two distinct power-conversion stage

AN3726 AN372REV13.3 Buck Stage DesignFigure 2 illustrates the steps for designing the buck stage.Figure 2. Buck Stage DesignBuck SpecificationDetermi

AN372AN372REV1 7Step 1) Choosing a Buck TopologyThe first step in designing the buck stage is to choose a tapped buck or a normal buck. Consider the

AN3728 AN372REV1Figure 3 illustrates a generic implementation of a buck converter using a tapped inductor topology. A normal buck stage can be impleme

AN372AN372REV1 9The buck stage is supplied by the boost output voltage. The boost output voltage is regulated within 10% by the boost stage. The buck