Cirrus-logic CS2200-CP Instrukcja Użytkownika

Copyright  Cirrus Logic, Inc. 2010(All Rights Reserved)http://www.cirrus.comFractional-N Frequency SynthesizerFeatures Delta-Sigma Fractional-N Freq

CS2200-CP10 DS759F24. ARCHITECTURE OVERVIEW4.1 Delta-Sigma Fractional-N Frequency SynthesizerThe core of the CS2200 is a Delta-Sigma Fractional-N Freq

CS2200-CPDS759F2 115. APPLICATIONS5.1 Timing Reference Clock InputThe low jitter timing reference clock (RefClk) can be provided by either an external

CS2200-CP12 DS759F25.1.2 Crystal Connections (XTI and XTO)An external crystal may be used to generate RefClk. To accomplish this, a 20 pF fundamental

CS2200-CPDS759F2 135.2.2 Ratio Modifier (R-Mod)The Ratio Modifier is used to internally multiply/divide the RUD (the Ratio stored in the register spac

CS2200-CP14 DS759F25.2.4 Ratio Configuration SummaryThe RUD is the user defined ratio stored in the register space. R-Mod is applied if selected. The

CS2200-CPDS759F2 155.4 Auxiliary OutputThe auxiliary output pin (AUX_OUT) can be mapped, as shown in Figure 10, to one of three signals: refer-ence cl

CS2200-CP16 DS759F2thesizer. This includes all the bits shown in Figure 8 on page 14.• Any discontinuities on the Timing Reference Clock, REF_CLK.5.6

CS2200-CPDS759F2 17The signal timings for a read and write cycle are shown in Figure 12 and Figure 13. A Start condition is de-fined as a falling tran

CS2200-CP18 DS759F2Send stop condition, aborting write. Send start condition. Send 100111x1(chip address & read operation). Receive acknowledge bi

CS2200-CPDS759F2 198. REGISTER DESCRIPTIONSIn I²C Mode all registers are read/write unless otherwise stated. In SPI mode all registers are write only.

CS2200-CP2 DS759F2TABLE OF CONTENTS1. PIN DESCRIPTION ...

CS2200-CP20 DS759F28.2.3 PLL Clock Output Disable (ClkOutDis)This bit controls the output driver for the CLK_OUT pin. 8.3 Device Configuration 1 (Add

CS2200-CPDS759F2 218.3.3 Enable Device Configuration Registers 1 (EnDevCfg1)This bit, in conjunction with EnDevCfg2, configures the device for control

CS2200-CP22 DS759F28.6 Function Configuration 1 (Address 16h)8.6.1 AUX PLL Lock Output Configuration (AuxLockCfg)When the AUX_OUT pin is configured as

CS2200-CPDS759F2 239. CALCULATING THE USER DEFINED RATIONote: The software for use with the evaluation kit has built in tools to aid in calculating an

CS2200-CP24 DS759F210.PACKAGE DIMENSIONSNotes: 1. Reference document: JEDEC MO-1872. D does not include mold flash or protrusions which is 0.15 mm max

CS2200-CPDS759F2 2511.ORDERING INFORMATION12.REFERENCES1. Audio Engineering Society AES-12id-2006: “AES Information Document for digital audio measure

CS2200-CP26 DS759F2Contacting Cirrus Logic SupportFor all product questions and inquiries, contact a Cirrus Logic Sales Representative. To find one ne

CS2200-CPDS759F2 38.7 Function Configuration 2 (Address 17h) ...

CS2200-CP4 DS759F21. PIN DESCRIPTIONPin Name # Pin DescriptionVD 1 Digital Power (Input) - Positive power supply for the digital and analog sections.G

CS2200-CPDS759F2 52. TYPICAL CONNECTION DIAGRAM 21GNDSCL/CCLKSDA/CDIN2 kΩXTI/REF_CLKTST_INXTOCLK_OUTAUX_OUT0.1 µFVD+3.3 VNotes:1. Resistors required

CS2200-CP6 DS759F23. CHARACTERISTICS AND SPECIFICATIONS RECOMMENDED OPERATING CONDITIONSGND = 0 V; all voltages with respect to ground. (Note 1)Notes:

CS2200-CPDS759F2 7AC ELECTRICAL CHARACTERISTICSTest Conditions (unless otherwise specified): VD = 3.1 V to 3.5 V; TA = -10°C to +70°C (Commercial Grad

CS2200-CP8 DS759F2CONTROL PORT SWITCHING CHARACTERISTICS- I²C FORMATInputs: Logic 0 = GND; Logic 1 = VD; CL=20pF.Notes: 8. Data must be held for suffi

CS2200-CPDS759F2 9CONTROL PORT SWITCHING CHARACTERISTICS - SPI FORMAT Inputs: Logic 0 = GND; Logic 1 = VD; CL=20pF.Notes: 9.tspi is only needed before