Cirrus-logic AN131 Instrukcja Użytkownika

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1
Copyright
Cirrus Logic, Inc. 1999
(All Rights Reserved)
P.O. Box 17847, Austin, Texas 78760
(512) 445 7222 FAX: (512) 445 7581
http://www.cirrus.com
AN131
Application Note
Interfacing the CS5521/22/23/24/28 to the 68HC05
TABLE OF CONTENTS
1. INTRODUCTION ................................................... 1
2. ADC DIGITAL INTERFACE ................................... 1
3. SOFTWARE DESCRIPTION ................................. 2
3.1 Initialize ............................................................. 2
3.2 Write Channel Setup Registers ........................ 2
3.3 Self-Offset Calibration ....................................... 3
3.4 Read/Write Gain Register ................................. 3
3.5 Acquiring Conversions ...................................... 4
4. MAXIMUM SCLK RATE ......................................... 4
5. CONCLUSION ....................................................... 5
6. APPENDIX: 68HC05 MICROCODE TO INTERFACE
TO THE CS5521/22/23/24/28 ................................ 6
1. INTRODUCTION
This application note details the interface of Cirrus
Logic’s Crystal
®
CS5521/22/23/24/28 Analog-to-
Digital Converter (ADC) to a Motorola 68HC05
microcontroller. This note takes the reader through
a simple example describing how to communicate
with the ADC. All algorithms discussed are includ-
ed in Section 6. “APPENDIX: 68HC05 Microcode
to Interface to the CS5521/22/23/24/28” on page 6.
2. ADC DIGITAL INTERFACE
The CS5521/22/23/24/28 interfaces to the 68HC05
through either a three-wire or a four-wire interface.
Figure 1 depicts the interface between the two de-
vices. Though this software was written to inter-
face to the three-wire SPI
TM
on the 68HC05, the
algorithms can be easily modified to work in the
four-wire format.
The ADC’s serial port consists of four control
lines: CS, SCLK, SDI, and SDO.
CS, Chip Select, is the control line which enables
access to the serial port.
SCLK, Serial Clock, is the bit-clock which controls
the shifting of data to or from the ADC’s serial
port.
SDI, Serial Data In, is the data signal used to trans-
fer data from the 68HC05 to the ADC.
SDO, Serial Data Out, is the data signal used to
transfer output data from the ADC to the 68HC05.
CS5521/22/23/24/28
68HC05
PA0
MOSI (PD3)
MISO (PD2)
SCK (PD4)
CS
SDI
SDO
SCLK
Figure 1. 3-Wire and 4-Wire Interfaces
CS5521/22/23/24/28 68HC05
No Connect
MOSI (PD3)
MISO (PD2)
SCK (PD4)
CS
SDI
SDO
SCLK
3-Wire Interface 4-Wire Interface
NOV ‘99
AN131REV2
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Podsumowanie treści

Strona 1 - Application Note

1Copyright  Cirrus Logic, Inc. 1999(All Rights Reserved)P.O. Box 17847, Austin, Texas 78760(512) 445 7222 FAX: (512) 445 7581http://www.cirrus.comA

Strona 2 - 3.1 Initialize

AN13110 AN131REV2;*****************************************************************************;* Routine - convert ;* Input - none;* Output - convers

Strona 3 - 3.4 Read/Write Gain Register

AN131AN131REV2 11JSR send_spi ;Transfer low byteRTS ;Return;*****************************************************************************;* Routine -

Strona 4 - 4. MAXIMUM SCLK RATE

AN13112 AN131REV2;* Routine - delay;* Input - count in ACCA;* Output - none;* This routine delays by using the count specified in ACCA. The 68HC05;*

Strona 7

AN1312 AN131REV23. SOFTWARE DESCRIPTIONThis note presents algorithms to initialize the68HC05 and the CS5521/22/23/24/28, modify theCS5521/22/23/24/28

Strona 8

AN131AN131REV2 3ing the number of Setups to be accessed and sub-tracting 1. Because each CSR holds two Setups,this number must always be an odd value,

Strona 9

AN1314 AN131REV23.5 Acquiring ConversionsTo acquire a conversion the subroutine convert iscalled. For single conversions on one physicalchannel, the

Strona 10

AN131AN131REV2 55. CONCLUSIONThis application note presents an example of howto interface the CS5521/22/23/24/28 to the68HC05. It is divided into two

Strona 11

AN1316 AN131REV26. APPENDIX: 68HC05 MICROCODE TO INTERFACE TO THE CS5521/22/23/24/28;****************************************************************

Strona 12

AN131AN131REV2 7MAIN EQU * ;Start from reset vector;*** Initialize and Calibrate the system ***JSR initialize ;Initialize the SystemJSR write_csrs ;Mo

Strona 13 - • Notes •

AN1318 AN131REV2BNE sloop ;Repeat loop if counter isn’t zeroLDA #%11111110 ;Load ACCA with last byteJSR send_spi ;Send final byte to ADCRTS ;Exit rout

Strona 14

AN131AN131REV2 9; Setup 4 Settings - (A1-A0 = 00, Physical Channel = 3, OWR = 15Hz,; input V-range = 25mV, Unipolar)LDA #$4C ;Load ACCA with first byt

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